The present invention relates generally to integrated circuit designs, and, more particularly, to on-die calibration circuit designs.
Electrical signals are reflected back when they reach the end of a transmission path, or at points where impedance differs. Signal reflection causes noise, which lowers signal quality. In a high-speed data transfer system, high quality signals are required and even a slight amount of noise can be a major problem. On-die-termination (ODT) reduces signal reflection by attaching a resistor with a suitable resistance value, to an I/O pin of a chip. The termination resistance ‘swallows’ the signaling voltage, which, therefore cannot be reflected.
When termination resistors are built on a die, the resistance of the resistors may fluctuate due to PVT (process, voltage, temperature) variations. Then an on-die PVT compensation circuit becomes desirable in a chip design. An on-die PVT compensation circuit automatically calibrates all the ODT resistors through internal calibration loops.
What is needed is an improved method and system for calibrating on-die components.